Dates and topics subject to change and will be updated during the semester to reflect modifications to the schedule.
Week, Date | Lecture | Reading | Assignments |
1-1 Jan 10 |
Intro and CMOS Scaling | Chapters 2 & 1.6 | Lab 1 assigned |
1-2 Jan 12 |
CMOS Scaling | ||
2-1 Jan 17 |
CMOS Scaling | Lab 2 assigned | |
2-2 Jan 19 |
Process Variation | Chapter 6 | Lab 1 due |
3-1 Jan 24 |
Process Variation | ||
3-2 Jan 26 |
Process Variation | ||
4-1 Jan 31 |
Process Variation | Lab 3 assigned | |
4-2 Feb 2 |
Process Variation | Lab 2 due | |
5-1 Feb 7 |
Class in CADE Lab | Chapters 7 & 8 | |
5-2 Feb 9 |
Logic circuit styles | Lab 4 assigned | |
6-1 Feb 14 |
Exam 1 | EXAM 1 | |
6-2 Feb 16 |
Logic circuit styles | Lab 3 due | |
7-1 Feb 21 |
Logic circuit styles | ||
7-2 Feb 23 |
Logic circuit styles | ||
8-1 Feb 28 |
Asynchronous Design | Chapters 9 & 11 & handouts | Lab 5 assigned |
8-2 Mar 2 |
Class in CADE Lab | Lab 4 due | |
9-1 Mar 7 |
Asynchronous Design | ||
9-2 Mar 9 |
Asynchronous Design | Lab 6 assigned | |
10-1 Mar 21 |
Timing Verification | Chapter 23 | Lab 5 due |
10-2 Mar 23 |
Timing Verification | ||
11-1 Mar 28 |
Timing Verification | Lab 7 assigned | |
11-2 Mar 30 |
Low leakage design | Chapters 3 & 4 | Lab 6 Due |
12-1 Apr 4 |
Exam 2 | EXAM 2 | |
12-2 Apr 6 |
Class in CADE Lab | Lab 8 assigned | |
13-1 Apr 11 |
Low leakage design | Lab 7 due | |
13-2 Apr 13 |
Interconnect & Inductance | Chapters 16, 17 & 19.1-2 | |
14-1 Apr 18 |
Interconnect & Inductance | Lab 9 Assigned | |
14-2 Apr 20 |
Packaging & power | Chapter 24 | Lab 8 Due |
15-1 Apr 25 |
Exam 3 | EXAM 3 | |
17-1 May 9 |
Lab 9 due |